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Software quality assurance is a critical mechanism to analyze the …
Software quality assurance (SQA) is a process which assures that all software engineering processes, methods, activities and work items are monitored and comply against the defined standards. These defined standards could be one or a combination of any like ISO 9000, CMMI model, ISO15504, etc.Read more
Software quality assurance (SQA) is a process which assures that all software engineering processes, methods, activities and work items are monitored and comply against the defined standards. These defined standards could be one or a combination of any like ISO 9000, CMMI model, ISO15504, etc.
There are several techniques/tools for SQA. Auditing is the chief technique that is widely adopted. However, we have a few other significant techniques as well.
Various SQA Techniques include:
Describe the function of the following pins in 8086 maximum mode of operation
(i) TEST: TEST pin is examined by the “WAIT” instruction. If the TEST pin is Low, execution continues. Otherwise the processor waits in an “idle” state. This input is synchronized internally during each clock cycle on the leading edge of CLK. (ii) RQ/GT0 and RQ/GT1 : Request/Grant. These pinsRead more
(i) TEST:
(ii) RQ/GT0 and RQ/GT1 :
(iii) QS0 and QS1 :
(iv) s0, s1, s2. :
Consider the following schema: Emp(eno,ename,ph_no,address,salary,dno) Department(dno,dname,location) Project(pno, dno,status) Works_On(eno,pno,hours) Solve the following queries using Relational Algebra operations a. List eno …
Consider the following relational schema. Employee (eno, NIC, ename, address, dnumber) Department (dno, dname) Project (pno, pname,location) Work_on (eno, pno, hired_date, hours) Considering the following data types for the above schema, create the following relational database using CREATE TRead more
Consider the following relational schema.
Employee (eno, NIC, ename, address, dnumber)
Department (dno, dname)
Project (pno, pname,location)
Work_on (eno, pno, hired_date, hours)
Considering the following data types for the above schema, create the following relational database using CREATE TABLE SQL statement. Ensure that appropriate referential integrity constraints (foreign keys) are met. Save the script as “CreateDB.sql”
See lessWhat are the main difference between flag register of 8086 and 8085?
The flag register in 8085 microprocessor contains 5 flags that is, Sign Flag, ZeroFlag, Auxiliary Carry Flag, Parity Flag and Carry Flag. while, The flag register in 8086 microprocessor contains9flags that is, Overflow Flag,Direction Flag, Interrupt Flag, Trap Flag, Sign Flag, Zero Flag, Auxiliary FRead more
The flag register in 8085 microprocessor contains 5 flags that is, Sign Flag, Zero
Flag, Auxiliary Carry Flag, Parity Flag and Carry Flag.
while,
The flag register in 8086 microprocessor contains9flags that is, Overflow Flag,
Direction Flag, Interrupt Flag, Trap Flag, Sign Flag, Zero Flag, Auxiliary Flag, Carry Flag, and Parity Flag.
8086 Flags:
Overflow Flag (O) – This flag will be set (1) if the result of a signed operation is too large to fit in the number of bits available to represent it, otherwise reset (0). After any operation, if D[6] generates any carry and passes to D[7] OR if D[6] does not generates carry but D[7] generates, overflow flag becomes set, i.e., 1. If D[6] and D[7] both generate carry or both do not generate any carry, then overflow flag becomes reset, i.e., 0.
Directional Flag (D) – This flag is specifically used in string instructions.
If directional flag is set (1), then access the string data from higher memory location towards lower memory location.
If directional flag is reset (0), then access the string data from lower memory location towards higher memory location.
Interrupt Flag (I) – This flag is for interrupts.
If interrupt flag is set (1), the microprocessor will recognize interrupt requests from the peripherals.
If interrupt flag is reset (0), the microprocessor will not recognize any interrupt requests and will ignore them.
Trap Flag (T) – This flag is used for on-chip debugging. Setting trap flag puts the microprocessor into single step mode for debugging. In single stepping, the microprocessor executes a instruction and enters into single step ISR.
See lessIf trap flag is set (1), the CPU automatically generates an internal interrupt after each instruction, allowing a program to be inspected as it executes instruction by instruction.
If trap flag is reset (0), no function is performed.
How the following works? (i)READY (ii)INTR (iii)NMI
Question 1 Howthe following works? (i)READY (ii)INTR (iii)NMI Answer: https://sikshapath.in/question/how-ready-intr-nmi-works-microprocessor/ Question 2 If the content of DS and BX register is 2500H and 1000H respectively. From which memory location will 8086 fetch the data while executing inRead more
Question 1
Howthe following works?
Answer:
Question 2
If the content of DS and BX register is 2500H and 1000H respectively. From which memory location will 8086 fetch the data while executing instruction MOV CX,[BX].
Answer:
See lessHow to initialize Weights and Biases in Neural Networks?
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Analyse the working of instruction queue in 8086?
The execution unit (EU) is supposed to decode or execute an instruction. When EU is busy in decoding and executing an instruction, the BIU fetches up to six instruction bytes for the next instructions. These bytes are called as the pre-fetched bytes and they are stored in a first in first out (FIFO)Read more
The execution unit (EU) is supposed to decode or execute an instruction. When EU is busy in decoding and executing an instruction, the BIU fetches up to six instruction bytes for the next instructions. These bytes are called as the pre-fetched bytes and they are stored in a first in first out (FIFO) register set, which is called as a queue.
The fetching of opcodes well in advance, prior to their need for execution increases the overall efficiency of the processor boosting its speed. The processor no longer has to wait for the memory access operations for the subsequent instruction opcode to complete.
Instruction queue is 6 bytes so that it can store the longest instruction.
8086 is the Ist processor to support Instruction Queue.
See lessState the significance of LOCK signal in 8086. In which …
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FOR ANSWER FOLLOW THE BELOW LINK:
By using least square principle for fitting, fit straight line …
Download the given attachment for the answer:
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See lessTrue or False – An operating system is a special …
Answer: False, the OS is software, it is not a physical part of the computer.
Answer: False, the OS is software, it is not a physical part of the computer.
See less